Memory devices are ubiquitous in the electronics industry. Memory devices may be implemented using arrays of magnetic elements that are constructed utilizing semiconductor processing techniques. The individual magnetic elements of the array may include materials with varying magnetic properties separated by an insulating layer. In this manner, the magnetic fields of the separated materials may be oriented in the same direction (termed “parallel”), or in an opposed orientation (termed “anti-parallel”). The electrical resistance of the magnetic elements may vary depending on the parallel or anti-parallel orientation of the magnetic fields. Digital information may be stored and retrieved by associating digital values (e.g., 1s and 0s) to the electrical resistance associated with the parallel and anti-parallel states.
To determine the resistance value of a memory element, which effectively determines the digital value contained therein, a voltage is typically developed across the memory element. Using this voltage, or alternately a current derived from this voltage, the resistance value of the memory element may be estimated. The digital value stored in the memory element thus may be determined from the measured resistance value.
Because memory elements are manufactured using semiconductor processing techniques, variations may develop across memory arrays due to processing inefficiencies, such as non-uniform deposition of materials during manufacturing. For example, insulating layers separating magnetic materials may vary in thickness across a wafer, resulting in memory elements within an array which have different resistive ranges for the same digital values. More specifically, processing inefficiencies that cause resistance fluctuations may cause inaccurate interpretation of the values stored in the memory array because it may be difficult to determine a resistance value corresponding to a binary ‘1’ value, and a resistance value corresponding to a binary ‘0’ value. Inaccurate interpretation of resistance may cause a binary ‘1’ value to be interpreted as a binary ‘0’, and vice-versa.
Accordingly, methods and apparatuses that improve the accuracy of determining memory element values are desirable.